A SVM Surrogate Model Based Method for Yield Optimization in Electronic Circuit Design

Yield optimization is a challenging topic in electronic circuit design. Methods for Yield optimization based on Montecarlo analysis of a circuit whose behavior is reproduced by simulations usually require too many time expensive simulations to be effective for iterative optimization. In this work we take inspiration from both the Montecarlo analysis based methods and machine learning methods in order to realize a methodology able to perform the Yield optimization in a more efficient way. The method we propose tackles the Yield optimization problem by embedding the training of a support vector machine surrogate model and the generation of a Montecarlo analysis into the optimization procedure. We report the numerical results obtained by using the proposed method for the design of two real consumer circuits provided by ST Microelectronics, and we compare these results with the ones obtained using the industrial benchmark currently adopted at ST Microelectronics for Yield optimization. These preliminary results show that the method is promising to be very efficient and capable of reaching design solutions with high values of the Yield.